Product Information

The Technobox, Inc. P/N 5307 Non-Volatile SRAM PMC provides a means for reliably storing up to 8 Megabytes of random-access data for at least 2 months during power down. A battery backed-up SRAM approach is superior to FLASH memory schemes, since true random read write is offered. FLASH schemes generally require time-consuming block-erase and complex programming algorithms. When the host/PMC is powered up, the 8 Megabytes of SRAM is mapped into the host processor space by the PCI bridge chip, and can be accessed from the host just like any other host-accessible memory area. To maintain integrity of the data, it is important that the host does not perform any destructive power-on confidence tests of this programmed region of memory space.

The SRAM array consists of sixteen 512Kx8b devices organized in four banks of 512Kx32b. The SRAM is fully byte-writable from the PCI bus, thereby allowing any partial word transfers between the host and the SRAM array. While the PMC is powered down, one 100 milliamp hour rechargeable Lithium battery supplies the SRAM such that the memory is retained for at least one month. The rechargeable Lithium Battery technology used for this product permits a maintenance-free battery backup scheme. The capacity life of the battery is not a concern, since the batteries are continuously being recharged while power is applied. Recharging current is obtained from the PMC bus +5V supply, while the rest of the board is powered from PMC bus 3.3V.

A non-volatile NV-RAM controller is used on the PMC so that when 3.3V falls below a value between 2.8 and 3.0 volts, the SRAMs are inhibited from further access, and the battery circuit starts supplying backup power to the SRAM array. This product can be populated in multiples of 2 Megabytes, up to a maximum of 8 Megabytes, on special production builds. The PCI bus interface chip used in this product, a PLX PCI9030, can operate with either 5V or 3.3V PCI bus signaling levels.