Our 64-Bit PMC Preprocessor (3770) permits extension of a PMC card beyond the edge of a host processor front panel, providing access to both Side 1 and Side 2 of a PMC under test.
The extender/analysis probe permits extension of a PMC card beyond the edge of a host processor front panel, providing access to both Side 1 and Side 2 of a PMC under test. Support is provided for the 64-bit PCI bus and connection for the 64 rear user I/O signals, as well as operation up to 66 MHz clock.
The board features self-resetting fuse protected power on +5V, +3.3V, +12V and -12V supplies, and current sensing for these supplies is provided. The sensing networks use a series resistance (0.01 ohms) together with a differential amplifier to provide a voltage proportional to current, and a user-supplied voltmeter measures these voltages at the 2mm test header. Analysis probe functionality enables access to the entire 64-bit PCI bus data, address, and control signals for display on an Agilent (formerly HP) 16xxx logic analyzer. The board allows individual signal probing of the 64 “user I/O” (JN4/PN4) at a 2mm header. The 64 rear I/O signals are not connected to the logic analyzer.
The Logic Analyzer termination is provided on the analysis probe, so external termination adapters, which require extra space and cost, are unnecessary. The user simply plugs the 40-pin Agilent Logic Analyzer cables directly into the analysis probe without any termination adapters required. Software provided with the pre-processor is developed by FuturePlus® Systems, a company experienced with Agilent logic analysis of PCI bus systems. A demonstrated installed base of hundreds of FuturePlus Systems PCI pre-processors assures users of a robust and user-friendly Agilent logic analysis operating environment for PMC applications.
This product will work with 33 MHz and 66 MHz clock speeds, and with either 32-bit or 64-bit bus widths. However, the user is cautioned that the round-trip insertion delay imposed by the signal propagation delay from one end of the extender to the other is approximately 2.1ns; this represents 15% of a 66 MHz clock cycle which must be accommodated by the system’s bus cycle timing margins. Careful attention was paid to the impedance control and routing of this board to attain best possible performance at 66 MHz clock speeds. A 10-layer board is employed (6 signals, 4 planes) to assure excellent signal integrity.
The PMC connectors for the board under test are located immediately behind the host processor front-panel, which minimizes PCI bus extension distance, yet allows access to the usable component area on a PMC. It is well-suited for the single-wide, standard thickness front panels, eliminating removal of the VMEbus front-panel. To save wear and tear on this product for situations of frequent mating/unmating, please refer to Technobox, Inc. P/N 2283 “PMC Socket Saver.”